1. Field of the Invention
The present invention generally relates to electronic circuits and, more specifically, to the monitoring of the activity of a circuit, of a component or of a function of an electronic circuit along time.
The present invention more specifically applies to the detection of a faulty operation of a circuit under the effect of a hacking attempt.
2. Discussion of the Related Art
In most circuits or components handling data considered as critical in terms of confidentiality, countermeasures against possible attempts to hack these data are desired to be provided.
A particularly common attack is the so-called side channel attack, where the consumption of the integrated circuit is analyzed (DPA—Differential Power Analysis) while said circuit performs operations manipulating secret data.
The detection of a side channel attack is generally performed by monitoring of the number of executions of the critical algorithm. Indeed, the attacker will make a great number of assumptions on data and/or keys and cause the execution of the algorithm a great number of times while analyzing the circuit power consumption.
A usual technique thus is to use a counter incremented or decremented on each new execution to detect when too high a number of operations is performed and then take the adequate measures. The counter of the number of operations is stored in a non-volatile memory area (EEPROM) of the integrated circuit. Indeed, the circuit is generally reset between successive attacks and the data should not be lost. There can be various types of countermeasures but the most frequent one is a disabling of the integrated circuit operation.
A disadvantage of this technique is that it does not take into account the time factor, which is important in case of an attack. Indeed, a large number of executions of the same algorithm gives an indication that an attack may be going on, but its repetition at high frequency is a more definite sign of attack.